1. Field of the Invention
The present invention relates to a semiconductor device manufacturing method and, more particularly, a method of manufacturing a semiconductor device to which copper wirings are provided.
2. Description of the Prior Art
In case a copper wiring is formed on the semiconductor device, a damascene method of embedding copper in a groove or hole formed in an insulating film is employed.
As a method of embedding the copper in the groove or hole, there are a method of forming a copper film in the groove (or hole) by sputter, a method of removing an unnecessary copper film by polishing after the copper film is grown on the insulating film and in the groove (or hole) by plating method or chemical vapor deposition, etc.
Then, an example of a method of embedding the copper in the hole will be explained with reference to FIGS. 1A to 1D hereinbelow.
As shown in FIG. 1A, first a insulating film 102 is formed on a silicon substrate 101, then a second insulating film 103 is formed on the insulating film 102, then a groove 104 is formed in the second insulating film 103, then a copper film is formed in the groove 104, and then the unnecessary copper film is removed by polishing, whereby the copper film remained in the groove 104 can be employed as a wiring 105.
After this, a silicon nitride film 106 is formed on the second insulating film 103 and the wiring 105, and then an interlayer insulating film 107 made of silicon oxide is formed on the silicon nitride film 106. Then, the interlayer insulating film 107 is patterned by the photolithography, so that a via hole 108 is formed over the wiring 105.
As the etching method of the via hole 108, for example, the interlayer insulating film 107 made of silicon oxide is selectively etched by the high density plasma by using the ICP (Inductive Coupled Plasma) equipment to reach the silicon nitride film 106. In other words, under the condition that the silicon nitride film 106 can function as the etching stopper, a part of the interlayer insulating film 107 is etched.
Then, as shown in FIG. 1B, the silicon nitride film 106 exposed from the via hole 108 is selectively etched, whereby a part of the wiring 105 is exposed from the via hole 108.
Then, as shown in FIG. 1C, a titanium nitride (TiN) barrier layer 109 is formed on the interlayer insulating film 107 and an inner surface of the via hole 108 by sputtering.
In turn, as shown in FIG. 1D, a copper film 110 is formed on the TiN barrier layer 109 by the electrolytic plating method while using the TiN barrier layer 109 as an electrode.
In this case, the first insulating film 102 is a local oxidation of silicon (LOCOS) film employed for device isolation, for example, and the second insulating film 103 is the interlayer insulating film for covering a semiconductor device formed on the silicon substrate 101.
However, if the TiN barrier layer 109 is formed by sputtering, the TiN barrier layer 109 is overhung over the via hole 108, as shown in FIG. 1C, to thus narrow a diameter of an opening of the via hole 108. As a result, a void 111 is caused in a copper film (plug) 110 in the via hole 108 shown in FIG. 1D, so that electric resistance of the copper film 110 in the via hole 108 is enhanced.
In order to eliminate such overhang, as shown in FIG. 2A, for example, there has been known the method in which the interlayer insulating film 107 is placed in the argon plasma atmosphere before the TiN barrier layer 109 is formed, to form an inclined surface on an upper peripheral edge of the via hole 108.
According to this method, as shown in FIG. 2B, since a surface of the wiring 105 is attacked by argon, copper constituting the wiring 105 is spread out to stick onto a side wall of the via hole 108, so that the copper is diffused into the interlayer insulating film 107. Therefore, resistance of copper diffusion portions is lowered to thus cause short-circuit of the wirings.
The interlayer insulating film 107 is etched by the ICP plasma etching equipment in forming the via hole 108. However, in order to prevent etching of the silicon nitride film 106, a carbon compound gas is employed as the etching gas. In this case, since the ICP plasma etching equipment can generate the high density plasma, polymer is stuck onto the inside of the chamber because of reaction of the carbon compound gas. As a result, shortening of the cleaning cycle of the chamber is caused.